As technology advances, integrated circuits are subject to competing demands relating to increases in processing power, increases in operating speeds, power consumption limitations and/or physical size limitations.
High-speed data communications can often require the use of synchronization circuitry, such as delay-locked loops (DLLs) or phase-locked loops (PLLs). Such circuits allow for synchronization of data signals and clocks. While such circuits can help compensate for skew, these and other circuits, can be adversely affected by power supply jitter. Transient noise from other circuits can be a significant source of such jitter.
On-chip voltage regulators are sometimes desired to help reduce or eliminate such jitter. Stability, power consumption, bandwidth and physical area of on-chip regulators can significantly impact the operating characteristics of a chip and become more prominent as the number of regulators increases.
The present invention may address one or more of the above issues.